Characterization of Fatigue and Its Recovery Behavior in Ferroelectric HfZrOIn this study, polarization fatigue of HfZrO ferroelectric is investigated with SILC (stress-induced-leakage-current) measurement under different E-field stresses. Under high-field, we observed strong correlation between polarization wake-up and SILC increase. This is attributed to oxygen vacancy redistribution and percolation path formation, especially at high frequency cycling. However, polarization fatigue at low field is found to occur without SILC increase. P-E loop measurements revealed that charge trapping is the main contributor under the low-bias. We demonstrated that the fatigue caused by low-field stress could be effectively recovered through an interspersed periodical, short-term cycles at high-field to manage charge trapping and oxygen vacancy redistribution, thus resulting in prolonged endurance to >1E12 cycles without SILC degradation at room temperature. We also validated that a negligible fatigue switching in HfZrO can be achieved at -40°C as low-temperature operation further reduces charge trapping.
The recent discovery of ferroelectricity (FE) in doped HfO2 ALD poly-crystal thin film (<10 nm) in 2011 has ignited much research by academia, research institutes, and industry. In addition to the compatibility of the ferroelectric material with current state-of-the-art CMOS processing technology, the potential high speed (<100 ns) and low switching energy operation has made the FE memory cell the subject of significant exploratory interest for emerging non-volatile memory applications. Beyond the typical memory cell with two stable polarization states, the FE memory cell also has potential applicability to analog synapses for AI/ML due to multiple effective polarization states from the existence of multiple polarization domains, as has also been shown in the literature for polycrystalline ferroelectric films. TSMC is exploring ferroelectric films and stacks and their controllability, state retention, endurance, and scalability for high density, high capacity digital memory integrated with advance CMOS technology.