
Germanium p-Channel FinFET Fabricated by aspect ratio trapping
We report scaled Ge p-channel FinFETs fabricated on a 300-mm Si wafer using the aspect-ratio-trapping technique. For long-channel devices, a combination of a trap-assisted tunneling and a band-to-band tunneling leakage mechanism is responsible for an elevated bulk current limiting the OFF-state drain current. However, the latter can be mitigated by device design. We report low long-channel subthreshold swing of 76 mV/decade at V DS =-0.5 V, good short-channel effect control, and high transconductance (g m =1.2 mS/μm at V DS =-1 V and 1.05 mS/μm at V DS =-0.5 V for L G =70 nm). The Ge FinFET presented in this paper exhibits the highest gm/SSsat at VDD=1 V reported for nonplanar unstrained Ge p-FETs to date. authors: Mark J. H. van Dal, Georgios Vellianitis, Blandine Duriez, Gerben Doornbos, Chih-Hua Hsieh, Bi-Hui Lee, Kai-Min Yin, Matthias Passlack, Carlos H. Diaz
Logic
Transistor Structure
TSMC CMOS logic technology relied on planar transistor structures until 2014, when FinFETs were introduced into production with our 16nm technology. The FinFET structure resolved a fundamental limitation of planar device scaling, namely the poor electrostatic control of the channel at short gate lengths. FinFETs also enabled a partial decoupling of the transistor density scaling from device effective width scaling, which is an important feature for attaining increased transistor current per unit footprint of transistors. These FinFET characteristics enabled significant reduction of the power supply voltage as compared to planar transistors. FinFET also presents new degrees of freedom for power performance optimization, which contributed to significant enhancements in energy efficiency from 16nm to our most recently introduced 5nm technology node.
TSMC research and development continues to explore next-generation structures such as stacked nanowires or stacked nanosheets in our quest for new heights in computing performance and energy efficiency for future technology nodes.