Reliability of dual damascene Cu metallization
The electromigration (EM) and bias temperature stress (BTS) performances of Cu metallization in dual damascene structure were examined. The experimental results show that Cu has more than one order of magnitude EM lifetime relative to Al alloy. The activation energy of electromigration of Cu trench is 0.9 eV. The failure sites of Cu dual damascene process after EM stress testing are mainly in the bottom of cathode site's vias. Via electromigration can be improved up to one order magnitude by optimizing several processes such as PR stripping, pad structure, etc. BTS study results indicate that the activation energy of Cu ion drift leakage is around 1.1 to 1.4 eV. The interface of capping SiN and SiO/sub 2/ was found to be the major copper diffusion path. Lifetime extrapolated from the empirical data indicates that the device can sustain longer than 1000 years under normal operation condition. authors: M.H. Tsai, W.J. Tsai, S.L. Shue, C.H. Yu, M.S. Liang
Interconnect
On-chip Interconnect
On-chip interconnect today is based on copper/low-k wiring – in today’s chips, there can be more than 100 km of copper wires.
TSMC’s leading edge technologies use a novel copper gap-fill solution to enable the fabrication of smaller conductor lines. Newly-developed materials and processes allow significant reduction in line and via resistance to improve chip performance. A comprehensive suite of innovations on integration scheme, low-k material, and low-k process with selective deposition further enhance both performance (through capacitance reduction) and reliability. Beyond copper interconnect, explorations of single metallic elements, binary and ternary alloys, and 2D materials for future interconnect materials are underway both within TSMC and with our academic partners.
