A 28nm Integrated True Random Number Generator Harvesting Entropy from MRAM
This paper presents an integrated True Random Number Generator (TRNG) based on the random switching behavior of Magnetic Tunnel Junctions (MTJs) under low write current. A complete TRNG is designed with minimal overhead to an existing embedded MRAM in 28nm CMOS. To the best of our knowledge, this is the first experimental study of this random process and the first TRNG implemented with commercial STT-MRAM technology. The prototype adds only 180μm 2 to a standard MRAM array for TRNG operation. It passes all NIST randomness tests across -25 to 100°C, while consuming 18pJ/bit with 66Mbps throughput at the nominal condition. authors: Kaiyuan Yang, Qing Dong, Zhehong Wang, Yi-Chun Shih, Yu-Der Chih, Jonathan Chang, David Blaauw, Dennis Svlvester
Memory
MRAM
Among the emerging non-volatile binary memories, spin-torque-transfer RAM (STT-MRAM), spin-oribit-torque RRAM (SOT MRAM), and voltage controlled MRAM (VC MRAM), are particularly attractive owing to their low-voltage operation, high speed and endurance properties, and advanced CMOS technology compatibility. TSMC has developed and offers STT-MRAM solutions to overcome scaling limitations of embedded Flash technologies. TSMC is actively exploring SOT-MRAM and VC-MRAM internally and in conjunction with external research laboratories, consortia, and academic partners. TSMC SOT-MRAM exploration is driven by high-speed (<2ns) binary memory solutions that can be significantly denser than conventional 6T-SRAM solutions while also being much more energy efficient.
