22nm STT-MRAM for Reflow and Automotive Uses with High Yield, Reliability, and Magnetic Immunity and with Performance and Shielding Options
We demonstrate high yield results from a solder-reflow-capable spin-transfer-torque MRAM embedded in 22nm ultra-low leakage (ULL) CMOS technology. The technology supports -40 to 150°C operation and data retention though six solder reflow cycles and far exceeding 10 years at 150°C. Ten year native magnetic field immunity is >1100 Oe at 25°C at the 1ppm bit upset level. A shield-in-package solution demonstrates <; 1ppm bit upset rates from a disc magnet providing 3.5 kOe disturb field exposure for ~80 hours at 25°C. Trading off reflow capability, using smaller CD magnetic tunnel junctions, higher performance is achieved, for example read signal development times of 6ns at 125°C and average write pulse times slightly over 30ns at -40°C in a 20Mb design. authors: W.J. Gallagher, Eric Chien, Tien-Wei Chiang, Jian-Cheng Huang, Meng-Chun Shih, C.Y. Wang, Chih-Hui Weng, Sean Chen, Christine Bair, George Lee, Yi-Chun Shih, Chia-Fu Lee, Po-Hao Lee, Roger Wang, Kuei- Hung Shen, J. J. Wu, Wayne Wang, Harry Chuang
Memory
MRAM
Among the emerging non-volatile binary memories, spin-torque-transfer RAM (STT-MRAM), spin-oribit-torque RRAM (SOT MRAM), and voltage controlled MRAM (VC MRAM), are particularly attractive owing to their low-voltage operation, high speed and endurance properties, and advanced CMOS technology compatibility. TSMC has developed and offers STT-MRAM solutions to overcome scaling limitations of embedded Flash technologies. TSMC is actively exploring SOT-MRAM and VC-MRAM internally and in conjunction with external research laboratories, consortia, and academic partners. TSMC SOT-MRAM exploration is driven by high-speed (<2ns) binary memory solutions that can be significantly denser than conventional 6T-SRAM solutions while also being much more energy efficient.
