
22nm STT-MRAM for Reflow and Automotive Uses with High Yield, Reliability, and Magnetic Immunity and with Performance and Shielding Options
We demonstrate high yield results from a solder-reflow-capable spin-transfer-torque MRAM embedded in 22nm ultra-low leakage (ULL) CMOS technology. The technology supports -40 to 150°C operation and data retention though six solder reflow cycles and far exceeding 10 years at 150°C. Ten year native magnetic field immunity is >1100 Oe at 25°C at the 1ppm bit upset level. A shield-in-package solution demonstrates <; 1ppm bit upset rates from a disc magnet providing 3.5 kOe disturb field exposure for ~80 hours at 25°C. Trading off reflow capability, using smaller CD magnetic tunnel junctions, higher performance is achieved, for example read signal development times of 6ns at 125°C and average write pulse times slightly over 30ns at -40°C in a 20Mb design. authors: W.J. Gallagher, Eric Chien, Tien-Wei Chiang, Jian-Cheng Huang, Meng-Chun Shih, C.Y. Wang, Chih-Hui Weng, Sean Chen, Christine Bair, George Lee, Yi-Chun Shih, Chia-Fu Lee, Po-Hao Lee, Roger Wang, Kuei- Hung Shen, J. J. Wu, Wayne Wang, Harry Chuang
Memory
Memory
Data is the most valuable resource in today’s digital economy. Currently over 2.5 quintillion (1018) bytes of data are generated daily and the pace is accelerating. More data than ever needs to be processed. Memory plays a key role in the flow of data. The gap between logic and memory is a bottle neck to system performance. To optimize the trade-off between cost and performance, a hierarchical memory system has been adopted. At the top of the hierarchy are static random access memories (SRAM) and dynamic random access memory (DRAM), both inherently volatile. SRAM is integrated right on the logic chips as cache memory to provide fastest access. DRAM is physically smaller than SRAM and consequently supports higher capacity. DRAM is generally an off-chip memory solution and ~10x slower than SRAM due to the need for constant refresh. Non-volatile memories (NVM) such as Flash are next in the hierarchy providing much higher memory capacity and density while also preserving information in the absence of power.
Recent new technologies are emerging rapidly to bring processing tasks near to or inside the memory to improve computing efficiency and enable new functionalities. Emerging NVMs use new types of materials and mechanisms to store data. They are promising for blending the memory hierarchy to boost the overall performance. Furthermore, their unique characteristics offer great potential to enable new applications (e.g. neuromorphic computing) and novel architectures (e.g. 3D integration).
TSMC’s non-volatile memory solutions include Flash, Spin-transfer torque magnetic random access memory (STT-MRAM), and resistive random access memory (RRAM). TSMC is also actively exploring phase change random access memory (PCRAM), and spin-orbit torque MRAM (SOT-MRAM) elements, as well as selector devices which are essential to support higher density cross-point array architectures.