Bilayer Alloy Contacts for High-Performance p-Type 2D Semiconductor Transistors
Notable progress has been reported for n-type contacts to two-dimensional (2D) materials, either through doping or through careful choice of contact metals. Here, we report on p-type contact engineering via substitutional doping and alloying. We tune the dopant concentration from lightly to heavily doped WSe2. We demonstrate that bilayer (2L) transition metal dichalcogenide (TMD) alloy can reach degenerate doping density for WSe2. The degenerate doping plays a critical role in lowering contact resistance (Rc) to metal. Extracted Rc is ~98 Ω·μm for a sheet resistance (Rsh) of 4.5 kΩ/sq, independent of the gate voltage (Vg). Pd/alloy contacts show superior thermal stability when compared to typical semimetal contacts (Bi and Sb). authors: Amin Azizi, Goutham Arutchelvan, Nathaniel Safron, Chih-Piao Chuu, Yangjin Lee, Mehmet Dogan, D. Mahaveer Sathaiya, H.-S. Philip Wong, Marvin Cohen, Alex Zettl3 and Iuliana P. Radu, Corporate Research, TSMC, San Jose, CA, USA, Corporate Research, TSMC, Hsinchu, Taiwan, University of California, Berkeley, CA, USA, TCADD, TSMC, Hsinchu, Taiwan
Logic
Logic
TSMC has been at the forefront of advanced CMOS logic technologies for which dense transistors are one of the two essential building blocks, the other being dense interconnect stacks. The intrinsic computing capability of a given logic technology is directly related to the number of interconnected transistors and their switching speed under representative loads originating from both the transistor or gates being driven and the related interconnect resistive and capacitive circuit loads.
TSMC research and development is continuously exploring novel and scalable transistor concepts to ensure sustainable, cost-effective, leading-edge logic technology performance and energy efficiency. We invite you to explore some of TSMC research areas in transistor structure, high-mobility channel, and low-dimensional materials and devices.
