
Atomically flat and uniform relaxed III-V epitaxial films on silicon substrate for heterogeneous and hybrid integration
The integration of III-V semiconductors on silicon (Si) substrate has been an active field of research for more than 30 years. Various approaches have been investigated, including growth of buffer layers to accommodate the lattice mismatch between the Si substrate and the III-V layer, Si- or Ge-on-insulator, epitaxial transfer methods, epitaxial lateral overgrowth, aspect-ratio-trapping techniques, and interfacial misfit array formation. However, manufacturing standards have not been met and significant levels of remaining defectivity, high cost, and complex integration schemes have hampered large scale commercial impact. Here we report on low cost, relaxed, atomically smooth, and surface undulation free lattice mismatched III-V epitaxial films grown in wide-fields of micrometer size on 300 mm Si(100) and (111) substrates. The crystallographic quality of the epitaxial film beyond a few atomic layers from the Si substrate is accomplished by formation of an interfacial misfit array. This development may enable future platforms of integrated low-power logic, power amplifiers, voltage controllers, and optoelectronics components. authors: Martin Holland, Mark van Dal, Blandine Duriez, Richard Oxland, Georgios Vellianitis, Gerben Doornbos, Aryan Afzalian, Ta-Kun Chen, Chih-Hua Hsieh, Peter Ramvall, Tim Vasen, Yee-Chia Yeo, Matthias Passlack
Logic
Logic
TSMC has been at the forefront of advanced CMOS logic technologies for which dense transistors are one of the two essential building blocks, the other being dense interconnect stacks. The intrinsic computing capability of a given logic technology is directly related to the number of interconnected transistors and their switching speed under representative loads originating from both the transistor or gates being driven and the related interconnect resistive and capacitive circuit loads.
TSMC research and development is continuously exploring novel and scalable transistor concepts to ensure sustainable, cost-effective, leading-edge logic technology performance and energy efficiency. We invite you to explore some of TSMC research areas in transistor structure, high-mobility channel, and low-dimensional materials and devices.