TSMC @ IEDM 2024

Semiconductor Industry Outlook and New Technology Frontiers

At the 70th International Electron Devices Meeting (IEDM) this year, TSMC Executive VP and Co-COO, Dr. Y.J. Mii, delivered a visionary keynote highlighting the semiconductor industry’s promising future and exploring new technological frontiers in device architecture, lithography, and system integration. In addition to Dr. Mii’s keynote, TSMC presented 19 papers on topics such as 2nm nanosheet technology, CFET device architecture, alternative channel materials, 3D integrated circuit technology, transition metal dichalcogenides, 2D material device advancements, and semiconducting oxides. As AI continues to transform every aspect of human existence, it enhances people’s daily lives by driving efficiency, enabling smarter decision-making, and fostering unprecedented innovation across industries. These advancements underscore the mission-critical role of semiconductor technology in powering AI solutions. At TSMC, we are committed to pushing the boundaries of semiconductor technology to create a smarter, more sustainable, and more beautiful world.

Semiconductor Industry Outlook and New Technology
Dr. Y.J. Mii, EVP & Co-COO, TSMC
The semiconductor industry is a dynamic landscape of innovation, where new materials, advanced processing techniques, and cutting-edge design converge to shape the future of technology. Powered by the principle of technology scaling, this field continues to push boundaries, enabling transformative applications in AI, HPC, 5G/6G, autonomous driving, IoT, and more. As we progress through time, scaling evolves, unlocking new levels of chip efficiency and performance. The horizon shines bright with the promise of breakthroughs in EUV lithography, new device architectures like CFETs, novel low-dimensional channel materials, and the strategic synergy of DTCO, paving the way for exciting new technology eras. Additionally, advanced packaging techniques enhance system-level performance, blending computational power to surpass current limitations. The growth in specialty technology segments such as RF, non-volatile memory, power management, CMOS image sensors, and Si photonics expands the range of innovative devices. This keynote paper will explore the latest advancements and emerging trends in the semiconductor industry, offering insights into how these cutting-edge frontiers will drive smart technology integration and create a brighter future for society.

TSMC Technology at IEDM 2024

TitleLead Author
Short Course
Sailing into the Future of the Semiconductor Industry
Lipen Yuan, TSMC
Tutorial
System Scaling with Wafer Level Integration Technologies
Chih-Hang Tung, TSMC
Late News
2nm Platform Technology featuring Energy-efficient Nanosheet Transistors and Interconnects co-optimized with 3DIC for AI, HPC and Mobile SoC Applications
Geoffrey Yeap, TSMC
ALT Highlight
First Demonstration of Monolithic CFET Inverter at 48nm Gate Pitch Toward Future Logic Technology Scaling
Szuya Liao, TSMC
Focus Session Invited Paper
Next Generation TSMC-SoIC® Platform for Ultra-High Bandwidth HPC Application
Yen-Ming Chen, TSMC
Focus Session Invited Paper
Logic Technology Device Innovations
Carlos Diaz, TSMC
Stacked Channel Transistors with 2D Materials: an Integration PerspectiveYun-Yan Chung, TSMC
Novel Parallel Digital Optical Computing System (DOC) for Generative A.I.Chun-Hao Fann, TSMC
EPIC-BOE: An Electronic-Photonic Chiplet Integration Technology with IC Processes for Broadband Optical Engine ApplicationsHarry Hsia, TSMC
Low-Power CMOS Inverter with Enhancement-mode Operation and Matched VTH at VDD = 1 V on Monolayer 2D Material ChannelAng-Sheng Chou, TSMC
Bilayer Alloy Contacts for High-Performance p-Type 2D Semiconductor TransistorsAmin Azizi, TSMC
Enhancement-mode Atomic Layer Deposited W-doped In2O3 Transistor at 55 nm Channel Length by Oxide Capping Layer with Improved StabilityQing Lin, TSMC
Statistics Based Modeling and Analysis of Ultra-Low Impedance Carbon Nanotube MOS CapacitorsMatthias Passlack, TSMC
MRAM Design-Technology-System Co-Optimization for Artificial Intelligence Edge DevicesWin-San Khwa, TSMC
Silicon Photonics Platform for Next Generation Data Communication TechnologiesSheng-Kai Yeh, TSMC
Design Strategy for Mitigating Off-state Current Degradation in Non-Conductive Stress (NCS) ReliabilityP.J. Liao, TSMC
Demonstration of Ferroelectric FET Memory with Oxide Semiconductor Channel to Achieve Smallest Cell Area 0.009 μm2 and High Endurance for Non-Volatile High-Bandwidth Memory ApplicationsChun-Chieh Lu, TSMC
Iso-performance N-type and P-type MOSFETs on densely aligned CNT array enabled by self-aligned extension doping with barrier boosterShengman Li, Stanford University
First Demonstration of an N-P Oxide Semiconductor Complementary Gain Cell MemoryFabia Farlin Athena, Stanford University