Events

The semiconductor industry is a dynamic landscape of innovation, where new materials, advanced processing techniques, and cutting-edge design converge to shape the future of technology. Powered by the principle of technology scaling, this field continues to push boundaries, enabling transformative applications in AI, HPC, 5G/6G, autonomous driving, IoT, and more. As we progress through time, scaling evolves, unlocking new levels of chip efficiency and performance. The horizon shines bright with the promise of breakthroughs in EUV lithography, new device architectures like CFETs, novel low-dimensional channel materials, and the strategic synergy of DTCO, paving the way for exciting new technology eras. Additionally, advanced packaging techniques enhance system-level performance, blending computational power to surpass current limitations. The growth in specialty technology segments such as RF, non-volatile memory, power management, CMOS image sensors, and Si photonics expands the range of innovative devices. This keynote paper will explore the latest advancements and emerging trends in the semiconductor industry, offering insights into how these cutting-edge frontiers will drive smart technology integration and create a brighter future for society.

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The semiconductor industry is powered by relentless innovations in materials, processes, devices, advanced packaging, circuit design, EDA, computing architecture, algorithms, and software. Technology scaling has been the key driving force behind the numerous innovations that have enabled and unleashed a vast spectrum of applications from artificial intelligence (AI), high-performance computing (HPC), wireless connectivity, autonomous driving, to consumer electronics. Technology scaling has also undergone significant changes over the past decades, a trend will continue into the future. At chip level, scaling continues to drive the power, performance, and area (PPA) of future products. Progression in lithography, device architecture, new materials, integration schemes, and design technology co-optimization (DTCO) will continue to drive new technology nodes. Looking into the future, new device architectures such as CFET and novel low-dimensional channel materials could provide significant scaling benefits. Beyond chip-level scaling innovations, advanced packaging technologies have become increasingly important to achieve system-level performance, integrating more compute resources, memory, and logic to address memory bandwidth, power delivery, and I/O bottlenecks. These advanced integration capabilities enhance data transfer rates, reduce latency, optimize power consumption, and elevate the overall performance of computing systems. Advanced technology scaling at both chip level and system level will continue to drive system performance to new heights for the foreseeable future.

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Semiconductors are the foundation of today’s digital economy and are powering innovations that will shape the trajectory of human history. This paper highlights the latest progress of the semiconductor industry to support a vast spectrum of applications that have forever changed our lives. It gives insight into the paths of continued advanced technology scaling, the essential role of design-technology co-optimization (DTCO), and how system-level integration will elevate system performance to new heights. The advancements of semiconductors will enable many new innovations in artificial intelligence (AI), high-performance computing(HPC), wireless connectivity, and autonomous driving. The paper also provides the trends of technologies ranging from low-power and edge AI devices to cloud-based computing. By harnessing the new capabilities of semiconductors, these innovations will greatly improve productivity, efficiency, safety, as well as sustainability. The semiconductor industry is indeed experiencing a “golden era” in spurring remarkable economic growth and unleashing innovations to create a better future for society.

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This year marks the 75th anniversary since the invention of the transistor and hence the beginning of the semiconductor industry that has had profound impact on the world and society at large. Technology scaling has been the key driving force behind the numerous innovations that usher in the Information Age. As the fast-expanding new applications in 5G, AI, ADAS, AR/VR and robotics continue to propel the demand for data-centric products and services, future generations of semiconductor technology will require innovations across the entire stack – from material and device to design infrastructure, architecture and system. In this paper, we will share our perspective of the applications trends and technology advancements that have brought us thus far. We will also outline key innovations that could lay the foundation for future logic technologies. We will conclude the presentation of our vision with 3D stacking technologies to extend scaling beyond existing frontier into the era of system integration, thus enabling a roadmap of energy-efficient compute to continue into the foreseeable future.

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21st century applications are going to be data-centric. Data analytics, machine learning, and AI applications are going to dominate, from data center to mobile and IoT, from collecting and processing, to curating the data to derive information. Many systems will need to learn and adapt on the fly. The emergence of abundant-data computing made the system throughput and system throughput/Watt the key performance metrics. These metrics can be improved by more and more specialization from CPU to GPU, to TPU and accelerators that are able to execute a narrow set of tasks in a massively parallel fashion. In other words flexibility can be traded off to maximize system throughput and energy efficiency. Computation throughput has been advancing faster than the memory bandwidth, resulting in a bandwidth deficit that limits system performance. With this in mind, this presentation will look at how the performance of those specialized architectures can be improved at the system level by advances of the underlying device and process technologies. An analysis of the technology trend for GPU and accelerators leads to a key observation: in the coming decades, we must go beyond a single chip from a wafer and focus on integrating chips into systems. 3DIC will unleash architecture innovations in computing.

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The foundry business model, pioneered by TSMC more than three decades ago, brought a sea change to technology innovation and how integrated circuits (ICs) and systems are designed and manufactured. Access to semiconductor technology is no longer limited to large corporations that invest billions of dollars to build a fabrication plant. The foundry model has democratized IC innovation, making it available to all visionaries and innovators. Today, an open innovation platform that connects innovators with semiconductor-technology providers is a vital link in the global supply chain. Our industry has already begun to look beyond just engineering individual chips manufactured on wafers, and have moved to integrate individual chips into systems. System performance and energy efficiency will continue to advance at historical rates, driven by innovations from many aspects, including materials, device and integration technology, circuit design, architecture, and systems. User applications drives design choices, and design choices are enabled by technology advancements. Advances in an open innovation ecosystem will further lower the entry barriers and unleash the future of innovation.

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Semiconductor technology migration is challenged by SoC Scaling, along with power, thermal and memory walls. Chiplets integration is a feasible resolution to address those issues. However, chiplet technology need innovation and leverage to achieve the goal. In this paper, we present foundry 3DFabric™ 2.5/3/3+ solutions to integrate chiplets for near- and long-term need. Close collaboration among the supply chain are strongly encouraged. We also propose a 3DIC (3D Interconnect Density) migration roadmap for industry and academia to align overall research and development activities.

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Three dimensional integration is one of the major technology directions for integrated circuits. From 2.5D integration on the package level to 3D integration by chip stacking and wafer stacking using processes in the far-back-end and monolithic 3D integration using back-end-of-the-line and front-end-of-the-line processes, there is a range of connection density that spans over 7 to 8 orders of magnitude. In other words, there is plenty of room for advancement for 3D ICs. I will give an overview of the semiconductor technologies that may need to be developed to realize monolithic 3D integration with the highest possible connection density between device layers. I will speculate on how they will be integrated into future electronic systems.

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While 5G and Artificial Intelligence (AI) technologies individually reshape industries and experiences, collectively 5G and AI are, perhaps, the most globally disruptive and transforming force that we’ve seen in decades. IC innovation focusing on energy efficient scaling will continue to power these changes that are revolutionizing our daily lives. Our future requires stronger partnerships across entire semiconductor ecosystem.

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In the past few decades, the semiconductor industry has been extremely successful in integrating discrete components into billion-transistor chips following a well-defined path – shrinking the transistor. It is no longer the case that the logic transistor is the only driver for technology advances. In the coming decades, we must go beyond a single chip on a wafer and focus on integrating chips into systems. I will describe the major technology trends and outline some of the solutions for advancing energy efficiency of future electronic systems.

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