Collaboration Programs

Stay connected with the next generation of innovators

Research is a global activity and also a human-intensive activity. Information exchange and collaboration are foundations of good research. TSMC collaborates with the global research community and stays connected with the next generation of innovators through joint research endeavors with universities and research institutes around the globe. Here, you will find some examples of our collaboration programs and events.

All Collaboration Programs

Stanford SystemX Alliance
Non-volatile Memory Technology Research Initiative (NMTRI)
Berkeley Emerging Technologies Research (BETR) Center
Berkeley Device Modeling Center
3D Systems Packaging Research Center
MIT Microsystems Technology Laboratories (MTL)
Heterogeneous Integration and Performance Scaling (CHIPS)
NTU-TSMC Research Center at National Taiwan University
NCTU-TSMC Research Center at National Chiao Tung University
NTHU-TSMC Research Center at National Tsing Hua University
NCKU-TSMC Research Center at National Cheng Kung University
Next-generation logic devices
Novel memory concepts
Advanced patterning
3D system integration
Advanced nano-interconnects
Quantum Computing
Materials and Components Analysis
Neuromorphic Computing
Joint University Microelectronics Program (JUMP)
Nanoelectronic Computing Research (nCORE)
Global Research Collaboration (GRC)
Chinese University of Hong Kong
Tohoku University
Tyndall University
UT Dallas
University of Michigan
University of Tokyo
University of Wisconsin

University Centers

SystemX emphasizes application-driven, system-oriented research. Its areas of interest include hardware and software at all levels of the system stack from materials and devices to systems and applications in electronics, networks, energy, mobility, bio-interfaces, sensors, and other real-world domains.

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Vision for Non-volatile Memory Technology Research Initiative aims at dealing with challenges of increasing needs for embedded memory with high density and low cost with power minimization by forming an interdisciplinary team of faculty, staff and students to look into technical feasibility at the device level, circuit/system level as well as develop a fundamental understanding for a variety of new non-volatile memory phenomena, materials and processes.

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New concepts for more energy-efficient logic switches (transistor replacements) and more energy-efficient on-chip communication (interconnect replacements) are needed to extend and go beyond the era of Moore’s Law. In addition to breakthroughs in solid-state science and technology, innovations in circuit design and system architecture will be necessary to avert a power crisis for computing. Focus areas of the center include the Looming Power Crisis for Computing, Advent of the Internet of Things, and Proliferation of Big Data Applications.

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The center is focused on developing compact modeling solutions for advanced semiconductor devices. The BSIM (Berkeley Short-channel IGFET Model) Group develops physics-based, accurate, scalable, robust, and predictive MOSFET SPICE models for circuit simulation and CMOS technology development.

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The Georgia Tech 3D Systems Packaging Research Center focuses on Smart, wearable, IOT, automotive, bio-electronics, and high-performance systems research. Focus areas are Electrical, Mechanical, and Thermal Design; Low-cost Glass Interposer and Package; Interconnections and Assembly; Functional Components - Passives and their Integration with Actives; 3D Glass Photonics; and MEMS and Sensors – High-power and High-temperature Electronics.

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MTL is predicated on the notion that nanoscale science and technology can help solve some of the world’s greatest problems in areas of energy, communications, water, health, information, and transportation. The focus is on fundamental research and engineering in materials, structures, devices, circuits and systems. MTL’s activities encompass integrated circuits, systems, electronic and photonic devices, MEMS, bio-MEMS, molecular devices, nanotechnology, sensors, and actuators.

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Starting from the application space, the design environment, and the integration scheme, appropriate new materials and components are being developed. These include energy sources, memory, sensors, passives, electromechanical and medical devices. UCLA CHIPS has pioneered the dielet revolution and develops new methodologies and infrastructure for integrating dielets (sometimes also called chiplets) at pitches comparable to on-chip wiring levels, enabling both latencies, bandwidth and energy per bit comparable to monolithic integration, but at the board level. CHIPS center has developed integration platforms for both rigid electronics based on silicon, flexible platforms based on bio-compatible materials, and monolithic 3D integration using wafer-to-wafer bonding for memory scaling and cognitive applications.  

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The major research interest of the Center include: 2D material, 2D devices, band structure analysis and simulation, emerging Si- & SiGe-based transistor, nanosheet transistor, backend interconnect, graphene, self-assembled monolayer molecule, high-K dielectric deposition, stacking of 3D electronics, ferroelectric material & memory, atomic layer technologies, negative capacitance FET, quantum computing using Si qubit, and synchrotron radiation photoemission studies on high-k/semiconductor interfaces.

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The major research interests include: monolithic stacked devices and circuits, negative-capacitance FETs, two-dimensional material field-effect transistors, 2D contact engineering, low-resistance interconnect technology, low contact resistance technology, and FinFETs technology for high speed and high frequency applications.

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Research interests focus on computing in memory, computing in sensor, neuromorphic computing, and advanced embedded computing to improve the combination of speed and power consumption by orders of magnitude, EUV negative resist with potential of high light absorption rate, small resist blur and thin resist film, EUV interference imaging platform, e-beam imaging platform and micro detector array for process improvement, etc. The Center also conducts more than 10 JDPs annually.

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The research focuses are quantum computing and RF circuit research & development. That includes fundamental qubit devices to the integration of multiple qubits, qubit test, noise analysis, cryo-CMOS device and modeling, design and integration of 24-GHz sensor RF receiver system, 24-GHz sub-circuits of LNA, PA, VCO, Mixer, PLL and its sensing application etc. The Center also conducts more than 10 JDPs annually.

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The Interuniversity Micro Electronics Center (Imec) is the largest European R&D and innovation hub in nanoelectronics and digital technologies. Imec brings together all key players from the value chain of the semiconductor industry. Thanks to close partnerships with leading tool and materials suppliers, imec can do advanced process development and offers an advanced research infrastructure housed within advanced laboratories, 200mm and 300mm cleanroom. In the imec Industrial Affiliation Program (IIAP), the semiconductor industry is brought together to help accelerate technology advancements, enabling efficient cost sharing, minimizing risk, and optimizing the return on investment for IDMs & foundries as well as equipment suppliers.

Imec aims to push Moore's law to the extreme by scaling down logic devices to the 7nm technology node and far beyond. Selected topics of research are:

  • Extending Si technology beyond FinFETs.
  • Novel channel materials, such as 2D-dichalchonenides.
  • Non charge-based logic, such as spin wave computing.
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Within the memory IIAP, imec develops novel memory concepts aimed for increased memory density, while at the same time controlling power dissipation. Current topics that are part of the program are:

  • High speed embedded on-chip cache memory such as STT- and SOT-MRAM
  • Scaled high speed dynamic random access memory (DRAM) devices
  • New Storage-class memories for massive data access in short time, such as Resistive (R-)RAM and Ferroelectric (FE-)RAM
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Within the IIAP on advanced lithography, imec works together with industry leaders to tackle the lithography challenges:

  • Explore materials and processes for next generation pattering
  • Assess manufacturability of high-NA EUV lithography and readiness for high volume manufacturing
  • Evaluate/compare lithographic imaging and patterning solutions for advanced logic and memory applications
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In the 3D IC IIAP, imec explores cost-effective realization of 3D interconnect technology with through-silicon-via (TSV). Imec also explores 3D design to propose methodologies for critical design issues, enabling effective use of 3D interconnection on system level:

  • Electrical, thermal and thermo-mechanical characterization and optimization
  • Chip-package interaction
  • Cost modeling
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The IIAP on advanced interconnects aims to explore together with industry leaders the options to increase bandwidth density and improve power performance for reliable high-speed distribution of signals within scaled logic and memory devices. Focus is on:

  • Beyond-Cu metals
  • Integration schemes beyond dual damascene
  • Low-k and air gap interlayer dielectrics
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Imec's platform for CMOS processing is a unique basis for quantum computer. In imec's Quantum Computing IIAP, silicon technology forms the base for development of a quantum computer technology and initially a Si compatible wafer-scale qubit demonstration is pursued.

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Imec supports the IIAP by the development and implementation of tomorrows materials characterization techniques. Some examples include:

  • The deployment of novel Scanning Probe Microscopy capabilities to support 2D materials R&D
  • The implementation of the novel SIMS approaches for array profiling
  • The transfer of micro-4-point-probe for local sheet resistance characterization to the fab environment
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The goal of the Neuromorphic computing (or Machine Learning) IIAP is to implement novel hardware capable of processing realistic problems at ultra-low power. Imec is developing an architecture that is scalable, highly flexible, and uses very little energy. The essential building block is an accelerator that uses truly in-memory-compute, using SRAM or novel non-volatile memory cells. For longer term, imec also aims to optimize novel memory element such as RRAM memory cells to mimic the synaptic behavior of neurons.

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Joint Development Programs

TSMC is committed to stay at the forefront of the semiconductor technology advances. As part of the ever-growing research activities, TSMC actively collaborates with distinguished researchers in academia world-wide to conduct fundamental and purpose-specific researches. Currently, TSMC's JDP collaborations are 80+ programs strong. And we always welcome more fruitful collaborations. With joint forces, TSMC strives to unleash the innovations of tomorrow.

For more information, please contact: Derek Lin (, Gary Chen (